// File Name: Project3_tb.v
`timescale 1ns/1ns
module Project3_tb();
	reg [2:0] OP;
	reg signed [3:0] A, B;
	wire signed [3:0] R;
	wire ovf;

// Instantiate the calculator (CombCalc)



// Specify your test procedures
initial begin
	// first test A=0, B=1, A+B (should get no ovf, R=1)
	OP = 3'b000;
	A = 4'd0;
	B = 4'd1;
	#10;	
	// Add more testcases here ...
end

endmodule // Project3_tb